The real FADC is a 9U-VME module connected to P-PCI via 32-bit
LVDS parallel interface. It is developed by Vienna. The following figure
shows the ending timing information of a transfer. XREQUEST is deasserted
first. This means the FADC tried to terminate a transfer before P-PCI
finishes a data transfer by deasserting XREADY and XENABLE.
Figure: Ending timing information of a transfer