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Linux $B%+!<%M%k(B2.4 $B$N3d$j9~$_=hM}$K$D$$$F(B(for x86)

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Last Modified: Mar. 15, 2001

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32$B!A(B47$B$N%Y%/%?$O(B IRQ $B$K$h$j3d$j9~$_$r5/$3$9%^%9%/2DG=3d$j9~$_$K3d$jEv$F$i$l$F$$$k!#(B

IRQ VECTOR DEVICE COMMENT 0 32 Timer Never use 1 33 Keybord Never use 2 34 PIC cascading Never use 3 35 Serial Port#2 known ISA uses 4 36 Serial Port#1 known ISA uses 5 37 (Parallel Port#2) 6 38 Floppy Disk known ISA uses 7 39 Parallel Port#1 known ISA uses 8 40 RTC(Real-Time Clock) 9 41 - 10 42 - 11 43 - 12 44 PS/2 mouse known ISA uses 13 45 fpu Avoid using 14 46 EIDE disk cont. #1 Avoid using 15 47 EIDE disk cont. #2 Avoid using

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start_kernel()$B$N(Binit_IRQ()$B$G(B IDT $B$N(B Interruput Gate Descriptor $B$N=i4|2=$r9T$J$&!#$3$3$G3d$j9~$_%Y%/%?!<(Bn+32(IRQn)$B$HBP1~$9$k(B $B3d$j9~$_%O%s%I%i(B IRQn_interrupt()$B$N%"%I%l%9$,$,(BIDT $B$K3JG<$5$l$k!#(B
2.4.0(init/main.c) asmlinkage void __init start_kernel(void) { char * command_line; unsigned long mempages; extern char saved_command_line[]; /* * Interrupts are still disabled. Do necessary setups, then * enable them */ lock_kernel(); printk(linux_banner); setup_arch(&command_line); printk("Kernel command line: %s\n", saved_command_line); parse_options(command_line); trap_init(); init_IRQ(); <=== sched_init(); time_init(); softirq_init(); ... --------------------------------------------------------------------- 2.4.0(arch/i386/kernel/i8259.c) void __init init_IRQ(void) { int i; ... /* * Cover the whole vector space, no vector can escape * us. (some of these will be overridden and become * 'special' SMP interrupts) */ for (i = 0; i < NR_IRQS; i++) { int vector = FIRST_EXTERNAL_VECTOR + i; if (vector != SYSCALL_VECTOR) set_intr_gate(vector, interrupt[i]); } ... --------------------------------------------------------------------- 2.4.0(arch/i386/kernel/traps.c) ... #define _set_gate(gate_addr,type,dpl,addr) \ do { \ int __d0, __d1; \ __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \ "movw %4,%%dx\n\t" \ "movl %%eax,%0\n\t" \ "movl %%edx,%1" \ :"=m" (*((long *) (gate_addr))), \ "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \ :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \ "3" ((char *) (addr)),"2" (__KERNEL_CS << 16)); \ } while (0) ... void set_intr_gate(unsigned int n, void *addr) { _set_gate(idt_table+n,14,0,addr); } ...
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Interrupt Descriptor Table(IDT)

IDT $B$O!"3d$j9~$_$dNc30$H$=$N4XO"$9$k%O%s%I%i$N%"%I%l%9$NBP1~%F!<%V%k$G$"$k!#(BIDT $B$O%2!<%H%G%#%9%/%j%W%?$rJB$Y$?$b$N$G!"$=$N3F%2!<%H$O3JG<$5$l$F$$$k(B $B=g=x$G3d$j9~$_HV9f$KBP1~IU$1$i$l$F$$$k!#3d$j9~$_$,H/@8$9$k$H3d$j9~$_HV9f$K(B $BBP1~$9$k0LCV$K$"$k%2!<%H$,8F$S=P$5$l$k!#(Bx86$B7O$G$O!V3d$j9~$_%2!<%H!W!V%H%i%C%W%2!<%H!W!V%?%9%/%2!<%H!W$N(B3$B $B!!(B
IRQ Data Structures

2.2.14 (arch/i386/kernel/irq.h) typedef struct { unsigned int status; /* IRQ status-IRQ_INPROGRESS,IRQ_DISABLED */ struct hw_interrupt_type *handler;/* handle/enable/disable functions */ struct irqaction *action; /* IRQ action list */ unsigned int depth; /* Disable depth for nested irq disables */ unsigned int unused[4]; } irq_desc_t; --------------------------------------------------------------------- 2.4.0 (include/linux/irq.h) ... typedef struct { unsigned int status; /* IRQ status */ hw_irq_controller *handler; struct irqaction *action; /* IRQ action list */ unsigned int depth; /* nested irq disables */ spinlock_t lock; } ____cacheline_aligned irq_desc_t; extern irq_desc_t irq_desc [NR_IRQS]; ... struct hw_interrupt_type { const char * typename; unsigned int (*startup)(unsigned int irq); void (*shutdown)(unsigned int irq); void (*enable)(unsigned int irq); void (*disable)(unsigned int irq); void (*ack)(unsigned int irq); void (*end)(unsigned int irq); void (*set_affinity)(unsigned int irq, unsigned long mask); }; typedef struct hw_interrupt_type hw_irq_controller; ... --------------------------------------------------------------------- 2.4.0 (arch/i386/kernel/i8259.c) static struct hw_interrupt_type i8259A_irq_type = { "XT-PIC", startup_8259A_irq, shutdown_8259A_irq, enable_8259A_irq, disable_8259A_irq, mask_and_ack_8259A, end_8259A_irq, NULL };
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BUILD_IRQ, BUILD_COMMON_IRRQ $B%^%/%m(B

2.4.0 (include/asm/hw_irq.h) #define BUILD_IRQ(nr) \ asmlinkage void IRQ_NAME(nr); \ __asm__( \ "\n"__ALIGN_STR"\n" \ SYMBOL_NAME_STR(IRQ) #nr "_interrupt:\n\t" \ "pushl $"#nr"-256\n\t" \ "jmp common_interrupt"); #define BUILD_COMMON_IRQ() \ __asm__( \ "\n" __ALIGN_STR"\n" \ "common_interrupt:\n\t" \ SAVE_ALL \ "call "SYMBOL_NAME_STR(do_IRQ)"\n\t" \ "jmp ret_from_intr\n");
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SAVE_ALL $B%^%/%m(B

2.4.0 (include/asm/hw_irq.h) ... #define SAVE_ALL \ "cld\n\t" \ "pushl %es\n\t" \ "pushl %ds\n\t" \ "pushl %eax\n\t" \ "pushl %ebp\n\t" \ "pushl %edi\n\t" \ "pushl %esi\n\t" \ "pushl %edx\n\t" \ "pushl %ecx\n\t" \ "pushl %ebx\n\t" \ "movl $" STR(__KERNEL_DS) ",%edx\n\t" \ "movl %edx,%ds\n\t" \ "movl %edx,%es\n\t" ...
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i8259.c

2.4.0 (arch/i386/kernel/i8259.c) BUILD_COMMON_IRQ( ) #define BI(x,y) \ BUILD_IRQ(x##y) #define BUILD_16_IRQS(x) \ BI(x,0) BI(x,1) BI(x,2) BI(x,3) \ BI(x,4) BI(x,5) BI(x,6) BI(x,7) \ BI(x,8) BI(x,9) BI(x,a) BI(x,b) \ BI(x,c) BI(x,d) BI(x,e) BI(x,f) ... #define IRQ(x,y) \ IRQ##x##y##_interrupt #define IRQLIST_16(x) \ IRQ(x,0), IRQ(x,1), IRQ(x,2), IRQ(x,3), \ IRQ(x,4), IRQ(x,5), IRQ(x,6), IRQ(x,7), \ IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \ IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f) void (*interrupt[NR_IRQS])(void) = { IRQLIST_16(0x0), #ifdef CONFIG_X86_IO_APIC IRQLIST_16(0x1), IRQLIST_16(0x2), IRQLIST_16(0x3), IRQLIST_16(0x4), IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7), IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb), IRQLIST_16(0xc), IRQLIST_16(0xd) #endif }; ...
--------------------------------------------------------------------- $B!!(B
do_IRQ( )

2.4.0 (arch/i386/kernel/irq.c) /* * do_IRQ handles all normal device IRQ's (the special * SMP cross-CPU interrupts have their own specific * handlers). */ asmlinkage unsigned int do_IRQ(struct pt_regs regs) { ... int irq = regs.orig_eax & 0xff; /* high bits used in ret_from_ code */ int cpu = smp_processor_id(); irq_desc_t *desc = irq_desc + irq; struct irqaction * action; unsigned int status; kstat.irqs[cpu][irq]++; spin_lock(&desc->lock); desc->handler->ack(irq); /* mask_and_ack_8259A() */ /* REPLAY is when Linux resends an IRQ that was dropped earlier WAITING is used by probe to mark irqs that are being tested */ status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING); status |= IRQ_PENDING; /* we _want_ to handle it */ /* * If the IRQ is disabled for whatever reason, we cannot * use the action we have. */ action = NULL; if (!(status & (IRQ_DISABLED | IRQ_INPROGRESS))) { action = desc->action; status &= ~IRQ_PENDING; /* we commit to handling */ status |= IRQ_INPROGRESS; /* we are handling it */ } desc->status = status; /* * If there is no IRQ handler or it was disabled, exit early. Since we set PENDING, if another processor is handling a different instance of this same irq, the other processor will take care of it. */ if (!action) goto out; ... for (;;) { spin_unlock(&desc->lock); handle_IRQ_event(irq, ®s, action); spin_lock(&desc->lock); if (!(desc->status & IRQ_PENDING)) break; desc->status &= ~IRQ_PENDING; } desc->status &= ~IRQ_INPROGRESS; out: /* * The ->end() handler has to deal with interrupts which got * disabled while the handler was running. */ desc->handler->end(irq); /* enable_8259A_irq(irq) */ spin_unlock(&desc->lock); if (softirq_active(cpu) & softirq_mask(cpu)) do_softirq(); return 1; } --------------------------------------------------------------------- int handle_IRQ_event(unsigned int irq, struct pt_regs * regs, struct irqaction * action) { int status; int cpu = smp_processor_id(); irq_enter(cpu, irq); status = 1; /* Force the "do bottom halves" bit */ if (!(action->flags & SA_INTERRUPT)) __sti(); do { status |= action->flags; action->handler(irq, action->dev_id, regs); action = action->next; } while (action); if (status & SA_SAMPLE_RANDOM) add_interrupt_randomness(irq); __cli(); irq_exit(cpu, irq); return status; }
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struct tasklet_struct { struct tasklet_struct *next; unsigned long state; atomic_t count; void (*func)(unsigned long); unsigned long data; };

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BH$B%O%s%I%i$O(B32$B 2.4.0 struct tq_struct { struct list_head list; /* linked list of active bh's */ unsigned long sync; /* must be initialized to zero */ void (*routine)(void *); /* function to call */ void *data; /* argument to function */ }; typedef struct list_head task_queue; #define DECLARE_TASK_QUEUE(q) LIST_HEAD(q) extern task_queue tq_timer, tq_immediate, tq_disk; 2.2.14 struct tq_struct { struct tq_struct *next; /* linked list of active bh's */ unsigned long sync; /* must be initialized to zero */ void (*routine)(void *); /* function to call */ void *data; /* argument to function */ }; typedef struct tq_struct * task_queue; #define DECLARE_TASK_QUEUE(q) task_queue q = NULL extern task_queue tq_timer, tq_immediate, tq_scheduler, tq_disk;
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2.4.0

tq_immediate

tq_timer

tq_disk

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2.4.0 2.2.14 enum { enum { TIMER_BH = 0, TIMER_BH = 0, TQUEUE_BH, CONSOLE_BH, DIGI_BH, TQUEUE_BH, SERIAL_BH, DIGI_BH, RISCOM8_BH, SERIAL_BH, SPECIALIX_BH, RISCOM8_BH, AURORA_BH, SPECIALIX_BH, ESP_BH, AURORA_BH, SCSI_BH, ESP_BH, IMMEDIATE_BH, NET_BH, CYCLADES_BH, SCSI_BH, CM206_BH, IMMEDIATE_BH, JS_BH, KEYBOARD_BH, MACSERIAL_BH, CYCLADES_BH, ISICOM_BH CM206_BH, }; JS_BH, MACSERIAL_BH, ISICOM_BH };
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2.4.0 /* mark_bh()$B!';XDj$7$?HV9f$N(BBH$B%O%s%I%i$N5/F0MW5a$r9T$J$&!#(B2.4 $B$G$O(BBH $B%O%s%I%i4X?t$O(B HI_SOFTIRQ $B%l%Y%k$N%=%U%H%&%(%"3d$j9~$_$H$7$FEPO?$5$l$k(B*/ static inline void mark_bh(int nr) { tasklet_hi_schedule(bh_task_vec+nr); } /* bh_action()$B!'(BBH $B%O%s%I%i$r$N(B BH $B%O%s%I%i$,F0:n$G$-$J$$$h$&$K6X;_%U%i%0$rN)$F$k(B */ static void bh_action(unsigned long nr) { int cpu = smp_processor_id(); if (!spin_trylock(&global_bh_lock)) goto resched; if (!hardirq_trylock(cpu)) goto resched_unlock; if (bh_base[nr]) bh_base[nr](); hardirq_endlock(cpu); spin_unlock(&global_bh_lock); return; resched_unlock: spin_unlock(&global_bh_lock); resched: mark_bh(nr); } /* init_bh()$B!';XDj$7$?HV9f$N(BBH$B%O%s%I%i$rEPO?$9$k(B */ void init_bh(int nr, void (*routine)(void)) { bh_base[nr] = routine; mb(); } /* remove_bh()$B!';XDj$7$?HV9f$N(BBH$B%O%s%I%i$rEPO?$r:o=|$9$k(B */ void remove_bh(int nr) { tasklet_kill(bh_task_vec+nr); bh_base[nr] = NULL; } 2.2.14 /* mark_bh()$B!';XDj$7$?HV9f$N(BBH$B%O%s%I%i$N5/F0MW5a$r9T$J$&(B */ extern inline void mark_bh(int nr) { set_bit(nr, &bh_active); } /* init_bh()$B!';XDj$7$?HV9f$N(BBH$B%O%s%I%i$rEPO?$9$k(B */ extern inline void init_bh(int nr, void (*routine)(void)) { unsigned long flags; bh_base[nr] = routine; atomic_set(&bh_mask_count[nr], 0); spin_lock_irqsave(&i386_bh_lock, flags); bh_mask |= 1 << nr; spin_unlock_irqrestore(&i386_bh_lock, flags); } /* remove_bh()$B!';XDj$7$?HV9f$N(BBH$B%O%s%I%i$rEPO?$r:o=|$9$k(B */ extern inline void remove_bh(int nr) { unsigned long flags; spin_lock_irqsave(&i386_bh_lock, flags); bh_mask &= ~(1 << nr); spin_unlock_irqrestore(&i386_bh_lock, flags); synchronize_bh(); bh_base[nr] = NULL; }

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$BCg5H0lCK(B Last Modified: Mar. 15, 2001

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Last Modified: Mar. 15, 2001