Nov 16, 2000 onl50t: デスクトップ Solaris 7 cc ドライバのテスト --- cc ドライバのデバッグ#012 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ (http://www-online.kek.jp/~inoue/CAMAC/onl50t-sol7/ Desktop/debug-step11.txt) 高エネルギー加速器研究機構 素粒子原子核研究所 物理、オンライングループ 井上 栄二 (1). 現状確認 (A). SPARC CPU-50T、Solaris7 が届いた。 (B). FORCE,CPU-50(UltraSPARC-IIi 300MHz)、に Solaris 7 のシステムを インストールした。 (C). /etc の下のシステム設定の途中、同一SCSIケーブル上に narrow の ディスクと wide のディスクを混在してつないだらシステムが立ち 上がらなくなってしまった。 (D). wide のディスクを narrow のディスクに替えてもらった。 (E). FORCE,CPU-50(UltraSPARC-IIi 300MHz)、に Solaris 7 のシステムを 再インストールした。 (F). /etc の下の各設定、および /export/home の作成をやった。 (G). CPU-50T に Solaris7用の VMEドライバ、FRCvme-2.4.1 をインストール (H). onl50t に ccドライバを make load しようとしたが、64ビット対応に なっていないために組み込めない。 (I). Solaris7、32ビット・カーネルで onl50t を起動して camacドライバを 組み込んだ。 (J). onl50t、Solaris7 で 32ビット・カーネルの下での camacドライバの 動作確認をやった。 正常に実行できた。 (K). Solaris7、32ビット・カーネルの下で、シングルアクション、割り込み を実行した時のデータ転送速度は正常に測定できたが、ブロック転送の データ転送速度を測定時にシステムがフリーズしてしまった。 (L). 32ビットカーネルを使ってブロック転送を実行すると、複数ワードの データ転送時にフリーズすることがある、この時 camacドライバに制御 が移っていないことを確認した。 (M). ドライバプログラムを64ビット対応にするために必要な作業について調 べた。 (N). lintを使ってcamacドライバプログラムをチェック。 camacドライバを    ロード、アンロードできるようになった。 (O). 64ビット・カーネルの下での camacドライバの動作確認をやった。    シングルアクションR/W はNG。 LAM割り込み処理はNG。 ブロック転送は    確認していない。 (P). CGENC、CGENZ、CGENI、CREMIの実行は正常に実行できるようになった。 (Q). camac シングルアクション read/write の部分をデバッグ中にシステムを 壊してしまった。 (R). Solaris 7 のシステム再インストールした(その2)。 (S). /etc の下の各設定、および /export/home の作成をした(その2)。 (T). VMEドライバ、FRCvme-2.4.1 を再インストールした(その2)。 (U). ccドライバをインストールした(その2)。 (V). camac Z、C が正しく動作できるが、camacシングルアクションread/write がうまく実行できない状況に復旧できた。 (W). camac シングルアクション read/writeは正常に実行できた。 (X). camac LAM割り込み処理の部分をチェック(その1)。 cc_attach()ルーチンを修正した。 camac 割り込み処理は NG. (Y). camac LAM割り込み処理は正常に実行できた。 (Z). camacブロック転送readは正しく実行できた。 camacブロック転送writeはNG. DMAをスタートすると"DMA Buffer Empty" の割り込みがかかってDMAは実行されない。 (2). ここでやるべきこと camacブロック転送writeの部分をチェックする(その2)。 (3). 現状確認 (3-1). camacブロック転送を実行時の記録 onl50t[69]% pwd /export/home/onl50t/inoue/CAMAC/FORCE-50T-sol7 onl50t[70]% ls Backup/ cam1.c camlib.c cc.conf cc_config.h Makefile cam2* camlib.c-org cc.h forlib.c Makefile-a cam2.f camlib.h cc.h-org forlib.o Makefile-org cam2a* camlib.o cc64 k2917.h Makefile.diff cam2a.f cc cc64.c libcamac.a README cam3* cc.c cc64.o script/ cam1* cam3.c cc.c-org cc_common.h onl50t[71]% mv Makefile Makefile-Nov1-2000 onl50t[72]% mv Makefile-a Makefile onl50t[73]% onl50t[75]% make clean \rm -f cc cc64 *.o libcamac.a cam1 cam2 cam2a cam3 *~ core onl50t[76]% make ./script/cc_build.sh [Building for sun4u] rm -f cc.o cc -xarch=v9 -O -c camlib.c -o camlib.o -I. cc -xarch=v9 -O -c forlib.c -o forlib.o -I. rm -f libcamac.a ar rcv libcamac.a camlib.o forlib.o a - camlib.o a - forlib.o ar: writing libcamac.a cc -xarch=v9 -O cam1.c -o cam1 -I. -L. -lcamac f77 -xarch=v9 -fast -O3 -u cam2.f -o cam2 -I. -L. -lcamac cam2.f: MAIN: cc -xarch=v9 -O cam3.c -o cam3 -I. -L. -lcamac f77 -xarch=v9 -fast -O3 -u cam2a.f -o cam2a -I. -L. -lcamac cam2a.f: MAIN: onl50t[77]% onl50t# make unload ./script/cc_unload.sh [Removing CAMAC device driver] [Removing CAMAC device driver from system] [Deleting CAMAC device files] onl50t# make load ./script/cc_load.sh [Installing CAMAC device driver] [Adding CAMAC device driver to system] [Configuring CAMAC device driver] [Making CAMAC device files] sun4u onl50t# Nov 1 15:18:35 onl50t unix: CAMAC device driver V1.4x, 1991-1993 by Y.TAKEUCHI (T.I.T.) 確認のために cam1の動作も見てみる。 onl50t[79]% cam1 Input n a f (data)>3 0 0 N=3 A=0 F=0 Q=1 X=1 Data:000000(Hex) 00000000(Dec) Input n a f (data)>3 0 16 333 N=3 A=0 F=16 Q=1 X=1 Data:00014D(Hex) 00000333(Dec) Input n a f (data)>3 0 0 N=3 A=0 F=0 Q=1 X=1 Data:00014D(Hex) 00000333(Dec) Input n a f (data)>3 0 16 555 N=3 A=0 F=16 Q=1 X=1 Data:00022B(Hex) 00000555(Dec) Input n a f (data)>3 0 0 N=3 A=0 F=0 Q=1 X=1 Data:00022B(Hex) 00000555(Dec) Input n a f (data)>^Conl50t[80]% onl50t[80]% 確認のために cam3の動作も見てみる。 onl50t[80]% cam3 *** Now waiting LAM ... N=3 Loop=10 Timeout=0 sec Interrupted !! count=1 Interrupted !! count=2 Interrupted !! count=3 Interrupted !! count=4 Interrupted !! count=5 Interrupted !! count=6 Interrupted !! count=7 Interrupted !! count=8 Interrupted !! count=9 Interrupted !! count=10 *** cam3 nomal end. onl50t[81]% (3-1-1). cam2a を使って 3ワード write/read 実行 camac メモリ・モジュールを使ってテストする。 1, 2, 3, 4,.... と増加 する 16ビットcamacデータを 3つ write し、その後で読み返してみる。 onl50t[56]% cam2a Input transfer mode (1:word 2:long word) >1 Input loop >3 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >3 Input n a f >4 0 16 write date is 1, 2, 3, 4,..... *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x3, *(buf+3) = 0x0 *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x3, *(buf+3) = 0x0 MODE=1 N= 4 A= 0 F=16 len= 3 lenr= 3 error= 0(Hex) Data( 1)= 1 0x 1(Hex) Data( 2)= 2 0x 2(Hex) Data( 3)= 3 0x 3(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Input n a f >4 0 0 *buf = 0x0, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x3, *(buf+3) = 0x0 MODE=1 N= 4 A= 0 F= 0 len= 3 lenr= 3 error= 0(Hex) Data( 1)= 1 0x 1(Hex) Data( 2)= 2 0x 2(Hex) Data( 3)= 3 0x 3(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Input n a f >4 0 0 *buf = 0x0, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x3, *(buf+3) = 0x0 MODE=1 N= 4 A= 0 F= 0 len= 3 lenr= 3 error= 0(Hex) Data( 1)= 1 0x 1(Hex) Data( 2)= 2 0x 2(Hex) Data( 3)= 3 0x 3(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[57]% Nov 1 16:33:17 onl50t unix: NOTICE: cc_write: cc->kreg-> csr = 0xa0 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov- >iov_base = 0x1 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: in: 0x4e4b78 6 1 46 0 0 Nov 1 16:33:17 onl50t unix: NOTICE: camac_b: write: call physio --- uio = 0x3e 1940 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: naf = 0x810 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: wc = 0x3 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address i s 4 bytes Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x 6 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dm ac_address =0x1, 0x0, 0x3, 0x0 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->maclo = 0xb7 8 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->machi = 0x0 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0 xa0 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_intr: 0x4e4b78 6 1 46 0 0 Nov 1 16:33:17 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb 78 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_a ddress =0x1, 0x0, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb7e Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_bas e =0x1, 0x2, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 1 16:33:17 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 1 16:33:17 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 1 16:33:17 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x a0 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: camac_b: write: cc->kreg->csr = 0xa0 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: out: 269119772 0 40 0 6 Nov 1 16:33:17 onl50t unix: NOTICE: camac_b: cc->len = 0x3, cc->k->mtc = 0x0 Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 1 16:33:17 onl50t Nov 1 16:33:17 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 1 16:33:17 onl50t onl50t console login: onl50t console login: onl50t console login: onl50t console login: onl50t console login: onl50t console login: Nov 1 16:33:28 onl50t unix: NOTICE: cc_write: cc->kreg-> csr = 0xc0a2 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov- >iov_base = 0x0 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: in: 0x4e4b78 6 1 46 0 0 Nov 1 16:33:28 onl50t unix: NOTICE: camac_b: read: call physio --- uio = 0x3e1 940 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: naf = 0x800 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: wc = 0x3 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address i s 4 bytes Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x 6 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dm ac_address =0x0, 0x2, 0x3, 0x0 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->maclo = 0xb78 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->machi = 0x0 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0 x80 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_intr: 0x4e4b78 6 1 46 0 0 Nov 1 16:33:28 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb 78 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_a ddress =0x0, 0x2, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb7e Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_bas e =0x1, 0x2, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 1 16:33:28 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 1 16:33:28 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 1 16:33:28 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x 80 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: camac_b: read: cc->kreg->csr = 0x80 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: out: 269119772 0 40 0 6 Nov 1 16:33:28 onl50t unix: NOTICE: camac_b: cc->len = 0x3, cc->k->mtc = 0x0 Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 1 16:33:28 onl50t Nov 1 16:33:28 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0x80 Nov 1 16:33:28 onl50t onl50t console login: onl50t console login: onl50t console login: onl50t console login: onl50t console login: Nov 1 16:33:42 onl50t unix: NOTICE: cc_write: cc->kreg-> csr = 0xc082 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov- >iov_base = 0x0 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: in: 0x4e4b78 6 1 46 0 0 Nov 1 16:33:42 onl50t unix: NOTICE: camac_b: read: call physio --- uio = 0x3e1 940 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: naf = 0x800 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: wc = 0x3 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address i s 4 bytes Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x 6 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dm ac_address =0x0, 0x2, 0x3, 0x0 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->maclo = 0xb78 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->machi = 0x0 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0 x80 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_intr: 0x4e4b78 6 1 46 0 0 Nov 1 16:33:42 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb 78 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_a ddress =0x0, 0x2, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb7e Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_bas e =0x1, 0x2, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 1 16:33:42 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 1 16:33:42 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 1 16:33:42 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x 80 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: camac_b: read: cc->kreg->csr = 0x80 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: out: 269119772 0 40 0 6 Nov 1 16:33:42 onl50t unix: NOTICE: camac_b: cc->len = 0x3, cc->k->mtc = 0x0 Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 1 16:33:42 onl50t Nov 1 16:33:42 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0x80 Nov 1 16:33:42 onl50t camac メモリ・モジュールに、16ビットcamacデータを 3つ write し、その後 read してみた。 正常に実行できている。 (3-1-2). cam2a を使って 2ワード write/read 実行 camac メモリ・モジュールを使ってテストする。 1, 2, 3, 4,.... と増加 する 16ビットcamacデータを 2つ writeし、その後で読み返してみる。 onl50t[57]% cam2a Input transfer mode (1:word 2:long word) >1 Input loop >2 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >2 Input n a f >4 0 16 write date is 1, 2, 3, 4,..... *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x0, *(buf+3) = 0x0 MODE=1 N= 4 A= 0 F=16 len= 2 lenr= 2 error= 0(Hex) Data( 1)= 1 0x 1(Hex) Data( 2)= 2 0x 2(Hex) Data( 3)= 0 0x 0(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Input n a f >4 0 0 *buf = 0x0, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x0, *(buf+3) = 0x0 MODE=1 N= 4 A= 0 F= 0 len= 2 lenr= 2 error= 0(Hex) Data( 1)= 1 0x 1(Hex) Data( 2)= 2 0x 2(Hex) Data( 3)= 0 0x 0(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[58]% Nov 1 16:42:19 onl50t unix: NOTICE: cc_write: cc->kreg-> csr = 0xa0 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov- >iov_base = 0x1 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: in: 0x4e4b78 4 1 44 0 0 Nov 1 16:42:19 onl50t unix: NOTICE: camac_b: write: call physio --- uio = 0x3e d940 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: naf = 0x810 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: wc = 0x2 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address i s 4 bytes Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x 4 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dm ac_address =0x1, 0x0, 0x3, 0x0 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->maclo = 0xb7 8 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->machi = 0x0 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0 xa0 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_intr: 0x4e4b78 4 1 44 0 0 Nov 1 16:42:19 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb 78 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_a ddress =0x1, 0x0, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb7c Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_bas e =0x1, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 1 16:42:19 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 1 16:42:19 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 1 16:42:19 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x a0 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: camac_b: write: cc->kreg->csr = 0xa0 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: out: 269119772 0 40 0 4 Nov 1 16:42:19 onl50t unix: NOTICE: camac_b: cc->len = 0x2, cc->k->mtc = 0x0 Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 1 16:42:19 onl50t Nov 1 16:42:19 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 1 16:42:19 onl50t onl50t console login: onl50t console login: onl50t console login: onl50t console login: onl50t console login: onl50t console login: Nov 1 16:42:31 onl50t unix: NOTICE: cc_write: cc->kreg-> csr = 0xc0a2 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov- >iov_base = 0x0 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: in: 0x4e4b78 4 1 44 0 0 Nov 1 16:42:31 onl50t unix: NOTICE: camac_b: read: call physio --- uio = 0x3ed 940 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: naf = 0x800 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: wc = 0x2 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address i s 4 bytes Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x 4 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dm ac_address =0x0, 0x2, 0x0, 0x0 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->maclo = 0xb78 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->machi = 0x0 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0 x80 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_intr: 0x4e4b78 4 1 44 0 0 Nov 1 16:42:31 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb 78 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_a ddress =0x0, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb7c Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_bas e =0x1, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 1 16:42:31 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 1 16:42:31 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 1 16:42:31 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x 80 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: camac_b: read: cc->kreg->csr = 0x80 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: out: 269119772 0 40 0 4 Nov 1 16:42:31 onl50t unix: NOTICE: camac_b: cc->len = 0x2, cc->k->mtc = 0x0 Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 1 16:42:31 onl50t Nov 1 16:42:31 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0x80 Nov 1 16:42:31 onl50t camac メモリ・モジュールに、16ビットcamacデータを 2つ write し、その後 read してみた。 正常に実行できている。 (3-1-3). cam2a を使って 1ワード write/read 実行 camac メモリ・モジュールを使ってテストする。 1, 2, 3, 4,.... と増加 する 16ビットcamacデータを 1つ writeし、その後で読み返してみる。 onl50t[58]% cam2a Input transfer mode (1:word 2:long word) >1 Input loop >2 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >1 Input n a f >4 0 16 <---- Freeze, ADD REC, RUN, M1 & Reset 2917 のリセット・ボタンを押したので当然 camac オペレーション は実行されなかった。 camac データウェイの LEDは何も反応しな かった。 write date is 1, 2, 3, 4,..... *buf = 0x1, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x1, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 MODE=1 N= 4 A= 0 F=16 len= 1 lenr= 1 error= 0(Hex) Data( 1)= 1 0x 1(Hex) Data( 2)= 0 0x 0(Hex) Data( 3)= 0 0x 0(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Input n a f >4 0 0 *buf = 0x0, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 <--- Freeze ここで、システムがパニック、リブートを起こしたのは正常な反応 と言える。 一回目のフリーズ時に 2917のリセット・ボタンを押して DMA はきれいに完了したわけではないので システムは異常な状況に なってしまうことが考えられる。 Nov 1 16:46:26 onl50t unix: NOTICE: cc_write: cc->kreg-> csr = 0xa0 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov- >iov_base = 0x1 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: in: 0x4e4b78 2 1 42 0 0 Nov 1 16:46:26 onl50t unix: NOTICE: camac_b: write: call physio --- uio = 0x3e d940 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: naf = 0x810 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: wc = 0x1 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address i s 4 bytes Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x 2 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dm ac_address =0x1, 0x0, 0x0, 0x0 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->maclo = 0xb7 8 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->machi = 0x0 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0 x461 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x1 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_intr: 0x4e4b78 2 1 42 0 0 Nov 1 16:46:26 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb 78 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_a ddress =0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb78 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_bas e =0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 1 16:46:26 onl50t Nov 1 16:46:26 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 1 16:46:26 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 1 16:47:55 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x 0 Nov 1 16:47:55 onl50t Nov 1 16:47:55 onl50t unix: NOTICE: camac_b: write: cc->kreg->csr = 0x0 Nov 1 16:47:55 onl50t Nov 1 16:47:55 onl50t unix: NOTICE: out: 269119772 0 40 0 2 Nov 1 16:47:55 onl50t unix: NOTICE: camac_b: cc->len = 0x1, cc->k->mtc = 0x0 Nov 1 16:47:55 onl50t Nov 1 16:47:55 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 1 16:47:55 onl50t Nov 1 16:47:55 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xff00 Nov 1 16:47:55 onl50t Nov 1 16:47:55 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0x0 Nov 1 16:47:55 onl50t onl50t console login: onl50t console login: onl50t console login: onl50t console login: onl50t console login: onl50t console login: onl50t console login: Nov 1 16:48:39 onl50t unix: NOTICE: cc_write: cc->kreg-> csr = 0x80 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov- >iov_base = 0x0 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: in: 0x4e4b78 2 1 42 0 0 Nov 1 16:48:39 onl50t unix: NOTICE: camac_b: read: call physio --- uio = 0x3ed 940 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: naf = 0x800 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: wc = 0x1 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address i s 4 bytes Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x 2 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dm ac_address =0x0, 0x0, 0x0, 0x0 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->maclo = 0xb78 Nov 1 16:48:39 onl50t Nov 1 16:48:39 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->machi = 0x0 Nov 1 16:48:39 onl50t BAD TRAP: cpu=0 type=0x31 rp=0x2a10004d880 addr=0x0 mmu_fsr=0x0 BAD TRAP occurred in module "unix" due to a NULL pointer dereference. sched: trap type = 0x31 pid=0, pc=0x10036564, sp=0x2a10004d121, tstate=0xf0001606, context=0x0 g1-g7: 2a10004dd60, 1041ef68, 0, 8, 30000573ed8, 0, 2a10004dd60 Begin traceback... sp = 2a10004d121 Called from 10074cbc, fp=2a10004d1d1, args=98 0 20 10423600 300000cf6b8 0 Called from 100ebd00, fp=2a10004d281, args=30000033000 71d36 30000033038 1 80000 00000000000 300000349e8 Called from 1002e110, fp=2a10004d351, args=3000002bf48 0 10000 30000573eb2 30000 573eb0 30000573ea8 Called from 100ebb70, fp=0, args=30000573e80 0 0 0 0 0 End traceback... panic[cpu0]/thread=2a10004dd60: trap syncing file systems... done panic[cpu0]/thread=2a100057d60: panic sync timeout dumping to /dev/dsk/c0t3d0s3, offset 31260672 100% done: 4200 pages dumped, compression ratio 3.52, dump succeeded rebooting... Resetting ... screen not found. Can't open input device. Keyboard not present. Using ttya for input and output. FORCE,CPU-50(UltraSPARC-IIi 300MHz), No Keyboard OpenBoot 3.10.8, 256 MB memory installed, Serial #9204337. Ethernet address 0:80:42:10:2:74, Host ID: 808c7271. Executing last command: boot Boot device: disk3:a File and args: SunOS Release 5.7 Version Generic_106541-06 64-bit [UNIX(R) System V Release 4.0 ] Copyright (c) 1983-1999, Sun Microsystems, Inc. NOTICE: VME: slavewin at vme=0x0, size=0x100000 space=0x302061f configuring network interfaces: hme0. Hostname: onl50t The / file system (/dev/rdsk/c0t3d0s0) is being checked. /dev/rdsk/c0t3d0s0: 2354 files, 56900 used, 52627 free /dev/rdsk/c0t3d0s0: (59 frags, 6571 blocks, 0.0% fragmentation) The /var file system (/dev/rdsk/c0t3d0s1) is being checked. /dev/rdsk/c0t3d0s1: 2864 files, 9983 used, 482376 free /dev/rdsk/c0t3d0s1: (192 frags, 60273 blocks, 0.0% fragmentation) The system is coming up. Please wait. checking ufs filesystems /dev/rdsk/c0t3d0s7: is stable. NIS domainname is kek.jp starting rpc services: rpcbind keyserv done. Setting netmask of hme0 to 255.255.248.0 Setting default interface for multicast: add net 224.0.0.0: gateway onl50t syslog service starting. Nov 1 16:50:40 onl50t savecore: reboot after panic: trap System dump time: Wed Nov 1 16:49:08 2000 Constructing namelist /var/crash/onl50t/unix.51 Constructing corefile /var/crash/onl50t/vmcore.51 100% done: 4200 of 4200 pages saved Print services started. volume management starting. The system is ready. onl50t console login: NG. 16ビットcamacデータを 1つだけ write しようとすると、2917 は ADD REC、RUN、M1 の各LEDが点灯し、DMA を実行しようとするが camacオペレーションは実行されない。 この状態でフリーズする。 ここまでの動作確認から言えることは、2ワード以上のデータ数を DMA write する場合には問題なく正しい値を転送することができている。 しかし、 1ワードだけを DMA writeすると DMA が開始されたところでフリーズする。 気になる点として、cc->dma_cookie.dmac_address の先頭アドレスの内容が 転送しようとするデータの数に関係なく常に "0x0" として認識されている点 である。 (4). cc->dma_cookie.dmac_address の調査 (4-1). cam2a を使って 15ワード write/read 実行 camac メモリ・モジュールを使ってテストする。 1, 2, 3, 4,.... と増加 する 16ビットcamacデータを 15ワード writeし、その後で読み返してみる。 onl50t[45]% cam2a Input transfer mode (1:word 2:long word) >1 Input loop >2 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >15 Input n a f >4 0 16 write date is 1, 2, 3, 4,..... *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x3, *(buf+3) = 0x4 *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x3, *(buf+3) = 0x4 MODE=1 N= 4 A= 0 F=16 len= 15 lenr= 15 error= 0(Hex) Data( 1)= 1 0x 1(Hex) Data( 2)= 2 0x 2(Hex) Data( 3)= 3 0x 3(Hex) Data( 4)= 4 0x 4(Hex) Data( 5)= 5 0x 5(Hex) Data( 6)= 6 0x 6(Hex) Data( 7)= 7 0x 7(Hex) Data( 8)= 8 0x 8(Hex) Data( 9)= 9 0x 9(Hex) Data(10)= 10 0x A(Hex) Input n a f >4 0 0 *buf = 0x0, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x3, *(buf+3) = 0x4 MODE=1 N= 4 A= 0 F= 0 len= 15 lenr= 15 error= 0(Hex) Data( 1)= 1 0x 1(Hex) Data( 2)= 2 0x 2(Hex) Data( 3)= 3 0x 3(Hex) Data( 4)= 4 0x 4(Hex) Data( 5)= 5 0x 5(Hex) Data( 6)= 6 0x 6(Hex) Data( 7)= 7 0x 7(Hex) Data( 8)= 8 0x 8(Hex) Data( 9)= 9 0x 9(Hex) Data(10)= 10 0x A(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[46]% Nov 2 10:10:18 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov->iov_base = 0x1 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: in: 0x4e4b78 30 1 70 0 0 Nov 2 10:10:18 onl50t unix: NOTICE: camac_b: write: call physio --- uio = 0x405940 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: naf = 0x810 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: wc = 0xf Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address is 4 bytes Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x1e Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address =0x1, 0x0, 0x3, 0x4 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->maclo = 0xb78 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->machi = 0x0 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0x561 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_intr: 0x4e4b78 30 1 70 0 0 Nov 2 10:10:18 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb78 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_address =0x1, 0x0, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xa Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb96 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_base =0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xa Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 2 10:10:18 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 2 10:10:18 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 2 10:10:18 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0xa0 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: camac_b: write: cc->kreg->csr = 0xa0 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: out: 269119772 0 40 0 30 Nov 2 10:10:18 onl50t unix: NOTICE: camac_b: cc->len = 0xf, cc->k->mtc = 0x0 Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 2 10:10:18 onl50t Nov 2 10:10:18 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 2 10:10:18 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xc0a2 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov->iov_base = 0x0 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: in: 0x4e4b78 30 1 70 0 0 Nov 2 10:10:51 onl50t unix: NOTICE: camac_b: read: call physio --- uio = 0x405940 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: naf = 0x800 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: wc = 0xf Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address is 4 bytes Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x1e Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address =0x0, 0x2, 0x3, 0x4 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->maclo = 0xb78 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->machi = 0x0 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0x541 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: 0x4e4b78 30 1 70 0 0 Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb78 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_address =0x0, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xa Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb96 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_base =0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xa Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x80 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: camac_b: read: cc->kreg->csr = 0x80 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: out: 269119772 0 40 0 30 Nov 2 10:10:51 onl50t unix: NOTICE: camac_b: cc->len = 0xf, cc->k->mtc = 0x0 Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 2 10:10:51 onl50t Nov 2 10:10:51 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0x80 Nov 2 10:10:51 onl50t 指定したデータ数だけ正常に write、read できた。 ユーザバッファに読み 出さされたデータの値も正しい値を示している。 気になる cc->dma_cookie.dmac_address の内容はこれまで通り "0x0" として 認識されている : Nov 2 10:10:51 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address =0x0, 0x2, 0x3, 0x4 : Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_address =0x0, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xa : Nov 2 10:10:51 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_base =0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xa : (4-2). cam2a を使って 1ワード read 実行 onl50t[39]% cam2a Input transfer mode (1:word 2:long word) >1 Input loop >1 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >1 Input n a f >3 1 0 *buf = 0x0, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x5, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 MODE=1 N= 3 A= 1 F= 0 len= 1 lenr= 1 error= 0(Hex) Data( 1)= 5 0x 5(Hex) Data( 2)= 0 0x 0(Hex) Data( 3)= 0 0x 0(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[40]% Nov 2 13:39:37 onl50t unix: NOTICE: cc_write: cc->kreg-> csr = 0xa0 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov- >iov_base = 0x0 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: in: 0x4e4b78 2 1 42 0 0 Nov 2 13:39:37 onl50t unix: NOTICE: camac_b: read: call physio --- uio = 0x3f9 940 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: naf = 0x620 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: wc = 0x1 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address i s 4 bytes Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x 2 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dm ac_address =0x0, 0x0, 0x3, 0x4 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->maclo = 0xb78 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->machi = 0x0 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0 x80 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_intr: 0x4e4b78 2 1 42 0 0 Nov 2 13:39:37 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb 78 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_a ddress =0x0, 0x0, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xa Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb7a Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_bas e =0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 2 13:39:37 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 2 13:39:37 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 2 13:39:37 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x 80 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: camac_b: read: cc->kreg->csr = 0x80 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: out: 269119772 0 40 0 2 Nov 2 13:39:37 onl50t unix: NOTICE: camac_b: cc->len = 0x1, cc->k->mtc = 0x0 Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 2 13:39:37 onl50t Nov 2 13:39:37 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0x80 Nov 2 13:39:37 onl50t DMA で 1ワード read は問題なく正常に実行できる。 (4-3). cam2a アプリケーションのコンパイル確認 onl50t[38]% rm cam2a onl50t[39]% make cam2a f77 -xarch=v9 -fast -O3 -u cam2a.f -o cam2a -I. -L. -lcamac cam2a.f: MAIN: onl50t[40]% camacライブラリはどうか。 onl50t[41]% rm libcamac.a forlib.o camlib.o onl50t[42]% make libcamac.a cc -xarch=v9 -O -c camlib.c -o camlib.o -I. cc -xarch=v9 -O -c forlib.c -o forlib.o -I. rm -f libcamac.a ar rcv libcamac.a camlib.o forlib.o a - camlib.o a - forlib.o ar: writing libcamac.a onl50t[43]% ccドライバはどうか。 : cc -c -D_KERNEL -xarch=v9 -D_MACHDEP -DSUNDDI -DKERNEL -D$ARCH \ -I. -I/usr/include -I/usr/share/src/uts/$ARCH \ -xcode=abs32 -xregs=no%appl -xO3 -c cc64.c # -xcode=abs64 -xregs=no%appl -xO3 -c cc64.c ld -r -o cc64 cc64.o : f77 の readme をチェック。 onlsun1[131]% which f77 /kek/compilers/ws5.0/SUNWspro/bin/f77 onlsun1[132]% f77 -V f77: WorkShop Compilers 5.0 98/12/15 FORTRAN 77 5.0 使用法: f77 [ オプション ] ファイル # 詳細は 'f77 -flags' を参照してください 。 onlsun1[133]% f77 -xhelp=readme 1998 年 12 月 22 日 Sun WorkShop 5.0 Developer Release 日本語版 Sun WorkShop Compiler FORTRAN 77 5.0 : -xarch=v9 -xarch=v9a (SPARC のみ) V9 SPARC または UltraSPARC プロセッサ用にコンパイルします。 生成されたオブジェクトコードは、Solaris 7 を実行する 64 ビットの SPARC または UltraSPARC プロセッサ上でのみリンク および実行できます (このオプションは、Solaris 7 環境内でコンパイル する場合にのみ有効です)。 : -xcode=abs32|abs44|abs64|pic13|pic32 (SPARC のみ) コンパイルするプログラムのメモリーアドレスモデルを指定できます。 SPARC プラットフォーム上でのみ有効です。このオプションを指定すると、 32 ビット、44 ビット、64 ビットのいずれかの絶対アドレスを使用する形 でコンパイルできるほか、大小の 2 つの「位置独立コード」モデル (それぞれ -PIC および -pic と同等) でコンパイルできます。 : -xregs=r (SPARC のみ) 使用するレジスタを指定します。 生成されたコードで使用するレジスタを指定します。 r には、以下の 1 つまたは複数の項目をコンマで区切って指定し ます。 [no%]appl, [no%]float 例 : -xregs=appl,no%float -xregs の値は、 -xarch の値に固有のものです。 appl g2、 g3、 g4 レジスタを使用できるようにします。 (v8、v8a) g2、 g3、 g4、 g5 レジスタを使用できるようにしま す。(v8plus、v8plusa) g2、 g3 レジスタを使用できる ようにします。(v9、v9a) no%appl appl レジスタを使用しません。 float SPARC ABI に指定されているように浮動小数点レジスタ を使用できるようにします。 no%float 浮動小数点レジスタを使用しません。 デフォルトは -xregs=appl,float です。 : Solaris 7 を実行中の SPARC V9 プロセッサ上でのリンク 多数の静的システムライブラリ (libm.a や libc.a など) は、Solaris 7 環境にある SPARC V9 プロセッサでは使用できません。このリリースに含まれ ているライブラリは、動的な共有ライブラリ (libm.so、libc.so) だけです。 したがって、SPARC V9 Solaris 7 環境で -Bstatic および -dn を指定する とリンクエラーが起こることがあります。そのような場合、アプリケーション では動的ライブラリを使用しなければなりません。 ユーザーライブラリの静的バージョンに明示的にリンクするには、以下のように コマンド行を使用してください。 f77 -o prog prog.f -Bstatic -lxyz -labc -Bdynamic libxyz.a と libabc.a に (ibxyz.so や libabc.so ではなく) リンクします。 続く -Bdynamic により、他のすべてのライブラリは明示的に動的リンクされ ます。中には システムライブラリ libm.so と libc.so が含まれています。 : -xO[n] -O[n] と同義です。 : -O[n] 最適化レベルを指定します。 -O[n] の指定がない場合、非常に基本的なレベルの最適化として、 局所的な共通部分式の除去と不要コードの分析だけが実行されま す。プログラムのパフォーマンスは、最適化なしの場合と比較し て、最適化レベルを指定してコンパイルした方が大幅に改善される ことがあります。通常のプログラムには、 -O オプション ( -O3 と同義) または -fast オプション ( BR -O4 と同義) の使用をお 勧めします。 -On の各レベルには、それよりも低いレベルでの最適化が含まれて います。一般に、プログラムのコンパイル時の最適化レベルが高い と、実行時のパフォーマンスも向上します。ただし、最適化レベル を高くすると、コンパイル時間が長くなり、実行可能ファイルのサ イズが大きくなります。 -g オプションは以前のバージョンのように -O[n] を抑止はしませ んが、デバッグ機能に制限が付きます。 SPARC の場合オプティマイザがメモリーを使い切ると、レベルを下 げて最適化をやり直します。以降のルーチンでは元のレベルに戻っ て最適化を行います。 最適化の詳細については、 『Fortran プログラミングガイド』の パフォーマンスプロファイリングに関する章と パフォーマンスと 最適化に関する章を参照してください。 -O 実際のアプリケーションのほとんどで最高に近いパフォーマ ンスが得られるようなレベルで最適化が行われます (現行リ リースでは -O3 と同義です)。 -O1 最小限の (局所的な) 最適化のみを行います。 -O2 局所的および大域的に基本的な最適化を行います。このレベ ルでは通常、生成されるコードのサイズが最小になります。 -O2 の使用が適しているのは、 -O3 を使用するとコンパイル 時間が長すぎる場合、スワップ領域が不足する場合、または 生成されるコードのサイズが大きすぎる場合です。それ以外 の場合は -O3 を使用してください。 -O3 関数レベルで大域的に最適化を行います。通常、生成される 実行可能ファイルのサイズはレベル -O2 や -O1 よりも大き くなります。 -O4 同一ファイル内にある関数を自動的にインライン化します。 -g オプションを指定すると、自動的なインライン化は実行さ れません。一般に、 -O4 ではコードのサイズがさらに大きく なります。 -O5 非常に強力な最適化を試みます。 このレベルは、プログラム実行時間の最大部分を消費する小 さいコード部分だけに適用してください。 -O5 の最適化アル ゴリズムを適用するソースプログラム部分が大きすぎると、 コンパイルに時間がかかるだけでなく、場合によってはパ フォーマンスも低下します。 プロファイルのフィードバックと併せて使用すると、このレ ベルの最適化がパフォーマンスの向上につながる可能性が高 まります。 -xprofile=p の項を参照してください。 : onlsun1[134]% (4-4). cam2a による DMA read 動作再確認 (4-4-1). 16 ビットデータを1つ read DMA write で 5ワード書いてから、DMA read を実行した。 つまり、DMA で 使用するシステム・バッファには、先に実行した DMA write 時に書いた データの痕跡が残っている。 どの様な残りかたをしているかチェック。 onl50t[148]% cam2a Input transfer mode (1:word 2:long word) >1 Input loop >1 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >1 Input n a f >3 1 0 *buf = 0x0, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x5, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 MODE=1 N= 3 A= 1 F= 0 len= 1 lenr= 1 error= 0(Hex) Data( 1)= 5 0x 5(Hex) Data( 2)= 0 0x 0(Hex) Data( 3)= 0 0x 0(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[149]% Nov 6 14:39:40 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov->iov_base = 0x0 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: in: 0x4e4b78 2 1 42 0 0 Nov 6 14:39:40 onl50t unix: NOTICE: camac_b: read: call physio --- uio = 0x3a1940 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: naf = 0x620 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: wc = 0x1 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address is 4 bytes Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x2 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address =0x0, 0x0, 0x3, 0x4, 0x5, 0x0 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->maclo = 0xb78 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->machi = 0x0 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0x80 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_intr: 0x4e4b78 2 1 42 0 0 Nov 6 14:39:40 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb78 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_address =0x0, 0x0, 0x3, 0x4, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb7a Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_base =0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 6 14:39:40 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 6 14:39:40 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 6 14:39:40 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x80 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: camac_b: read: cc->kreg->csr = 0x80 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: out: 269119772 0 40 0 2 Nov 6 14:39:40 onl50t unix: NOTICE: camac_b: cc->len = 0x1, cc->k->mtc = 0x0 Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 6 14:39:40 onl50t Nov 6 14:39:40 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0x80 Nov 6 14:39:40 onl50t (4-4-2). 16 ビットデータを2つ read DMA write で 5ワード書いてから、DMA read を実行した。 つまり、DMA で 使用するシステム・バッファには、先に実行した DMA write 時に書いた データの痕跡が残っている。 どの様な残りかたをしているかチェック。 onl50t[150]% cam2a Input transfer mode (1:word 2:long word) >1 Input loop >1 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >2 Input n a f >3 1 0 *buf = 0x0, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x5, *(buf+1) = 0x5, *(buf+2) = 0x0, *(buf+3) = 0x0 MODE=1 N= 3 A= 1 F= 0 len= 2 lenr= 2 error= 0(Hex) Data( 1)= 5 0x 5(Hex) Data( 2)= 5 0x 5(Hex) Data( 3)= 0 0x 0(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[151]% Nov 6 14:46:02 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov->iov_base = 0x0 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: in: 0x4e4b78 4 1 44 0 0 Nov 6 14:46:02 onl50t unix: NOTICE: camac_b: read: call physio --- uio = 0x3a1940 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: naf = 0x620 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: wc = 0x2 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address is 4 bytes Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x4 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address =0x0, 0x0, 0x3, 0x4, 0x5, 0x0 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->maclo = 0xb78 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->machi = 0x0 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0x80 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_intr: 0x4e4b78 4 1 44 0 0 Nov 6 14:46:02 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb78 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_address =0x0, 0x0, 0x3, 0x4, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb7c Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_base =0x5, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 6 14:46:02 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 6 14:46:02 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 6 14:46:02 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x80 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: camac_b: read: cc->kreg->csr = 0x80 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: out: 269119772 0 40 0 4 Nov 6 14:46:02 onl50t unix: NOTICE: camac_b: cc->len = 0x2, cc->k->mtc = 0x0 Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 6 14:46:02 onl50t Nov 6 14:46:02 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0x80 Nov 6 14:46:02 onl50t (4-4-3). 16 ビットデータを3つ read DMA write で 5ワード書いてから、DMA read を実行した。 つまり、DMA で 使用するシステム・バッファには、先に実行した DMA write 時に書いた データの痕跡が残っている。 どの様な残りかたをしているかチェック。 onl50t[152]% cam2a Input transfer mode (1:word 2:long word) >1 Input loop >1 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >3 Input n a f >3 1 0 *buf = 0x0, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x5, *(buf+1) = 0x5, *(buf+2) = 0x5, *(buf+3) = 0x0 MODE=1 N= 3 A= 1 F= 0 len= 3 lenr= 3 error= 0(Hex) Data( 1)= 5 0x 5(Hex) Data( 2)= 5 0x 5(Hex) Data( 3)= 5 0x 5(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[153]% Nov 6 14:51:14 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov->iov_base = 0x0 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: in: 0x4e4b78 6 1 46 0 0 Nov 6 14:51:14 onl50t unix: NOTICE: camac_b: read: call physio --- uio = 0x3a1940 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: naf = 0x620 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: wc = 0x3 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address is 4 bytes Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x6 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address =0x0, 0x0, 0x3, 0x4, 0x5, 0x0 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->maclo = 0xb78 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->machi = 0x0 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0x80 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_intr: 0x4e4b78 6 1 46 0 0 Nov 6 14:51:14 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb78 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_address =0x0, 0x0, 0x3, 0x4, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb7e Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_base =0x5, 0x5, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 6 14:51:14 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 6 14:51:14 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 6 14:51:14 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x80 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: camac_b: read: cc->kreg->csr = 0x80 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: out: 269119772 0 40 0 6 Nov 6 14:51:14 onl50t unix: NOTICE: camac_b: cc->len = 0x3, cc->k->mtc = 0x0 Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 6 14:51:14 onl50t Nov 6 14:51:14 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0x80 Nov 6 14:51:14 onl50t (4-4-4). 16 ビットデータを4つ read DMA write で 5ワード書いてから、DMA read を実行した。 つまり、DMA で 使用するシステム・バッファには、先に実行した DMA write 時に書いた データの痕跡が残っている。 どの様な残りかたをしているかチェック。 onl50t[154]% cam2a Input transfer mode (1:word 2:long word) >1 Input loop >1 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >4 Input n a f >3 1 0 *buf = 0x0, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x5, *(buf+1) = 0x5, *(buf+2) = 0x5, *(buf+3) = 0x5 MODE=1 N= 3 A= 1 F= 0 len= 4 lenr= 4 error= 0(Hex) Data( 1)= 5 0x 5(Hex) Data( 2)= 5 0x 5(Hex) Data( 3)= 5 0x 5(Hex) Data( 4)= 5 0x 5(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[155]% Nov 6 14:54:53 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov->iov_base = 0x0 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: in: 0x4e4b78 8 1 48 0 0 Nov 6 14:54:53 onl50t unix: NOTICE: camac_b: read: call physio --- uio = 0x3a1940 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: naf = 0x620 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: wc = 0x4 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address is 4 bytes Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x8 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address =0x0, 0x0, 0x3, 0x4, 0x5, 0x0 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->maclo = 0xb78 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->machi = 0x0 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0x80 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_intr: 0x4e4b78 8 1 48 0 0 Nov 6 14:54:53 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb78 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_address =0x0, 0x0, 0x3, 0x4, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb80 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_base =0x5, 0x5, 0x5, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 6 14:54:53 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 6 14:54:53 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 6 14:54:53 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x80 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: camac_b: read: cc->kreg->csr = 0x80 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: out: 269119772 0 40 0 8 Nov 6 14:54:53 onl50t unix: NOTICE: camac_b: cc->len = 0x4, cc->k->mtc = 0x0 Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 6 14:54:53 onl50t Nov 6 14:54:53 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0x80 Nov 6 14:54:53 onl50t (4-5). cam2a による DMA write 動作再確認 (4-5-1). 16 ビットデータを4つ write DMA read で 10ワード書いてから、DMA write を実行した。 つまり、DMA で 使用するシステム・バッファには、先に実行した DMA read 時に読んだ データの痕跡が残っている。 どの様な残りかたをしているかチェック。 onl50t[40]% cam2a Input transfer mode (1:word 2:long word) >1 Input loop >1 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >4 Input n a f >3 0 16 write date is 1, 2, 3, 4,..... *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x3, *(buf+3) = 0x4 *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x3, *(buf+3) = 0x4 MODE=1 N= 3 A= 0 F=16 len= 4 lenr= 4 error= 0(Hex) Data( 1)= 1 0x 1(Hex) Data( 2)= 2 0x 2(Hex) Data( 3)= 3 0x 3(Hex) Data( 4)= 4 0x 4(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[41]% Nov 7 09:50:03 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov->iov_base = 0x1 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: in: 0x4e4b78 8 1 48 0 0 Nov 7 09:50:03 onl50t unix: NOTICE: camac_b: write: call physio --- uio = 0x335940 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: naf = 0x610 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: wc = 0x4 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address is 4 bytes Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x8 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address =0x1, 0x0, 0x5, 0x5, 0x5, 0x5 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->maclo = 0xb78 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->machi = 0x0 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0xa0 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_intr: 0x4e4b78 8 1 48 0 0 Nov 7 09:50:03 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb78 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_address =0x1, 0x0, 0x5, 0x5, 0x5, 0x5, 0x5, 0x5, 0x5, 0x5 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb80 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_base =0x1, 0x2, 0x3, 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 7 09:50:03 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 7 09:50:03 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 7 09:50:03 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0xa0 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: camac_b: write: cc->kreg->csr = 0xa0 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: out: 269119772 0 40 0 8 Nov 7 09:50:03 onl50t unix: NOTICE: camac_b: cc->len = 0x4, cc->k->mtc = 0x0 Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 7 09:50:03 onl50t Nov 7 09:50:03 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 7 09:50:03 onl50t (4-5-2). 16 ビットデータを3つ write DMA read で 10ワード読んでから、DMA write を実行した。 つまり、DMA で 使用するシステム・バッファには、先に実行した DMA read 時の読み出した データの痕跡が残っている。 どの様な残りかたをしているかチェック。 onl50t[42]% cam2a Input transfer mode (1:word 2:long word) >1 Input loop >1 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >3 Input n a f >3 0 16 write date is 1, 2, 3, 4,..... *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x3, *(buf+3) = 0x0 *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x3, *(buf+3) = 0x0 MODE=1 N= 3 A= 0 F=16 len= 3 lenr= 3 error= 0(Hex) Data( 1)= 1 0x 1(Hex) Data( 2)= 2 0x 2(Hex) Data( 3)= 3 0x 3(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[43]% Nov 7 09:53:22 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov->iov_base = 0x1 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: in: 0x4e4b78 6 1 46 0 0 Nov 7 09:53:22 onl50t unix: NOTICE: camac_b: write: call physio --- uio = 0x335940 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: naf = 0x610 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: wc = 0x3 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address is 4 bytes Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x6 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address =0x1, 0x0, 0x5, 0x5, 0x5, 0x5 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->maclo = 0xb78 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->machi = 0x0 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0xa0 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_intr: 0x4e4b78 6 1 46 0 0 Nov 7 09:53:22 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb78 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_address =0x1, 0x0, 0x5, 0x5, 0x5, 0x5, 0x5, 0x5, 0x5, 0x5 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb7e Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_base =0x1, 0x2, 0x3, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 7 09:53:22 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 7 09:53:22 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 7 09:53:22 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0xa0 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: camac_b: write: cc->kreg->csr = 0xa0 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: out: 269119772 0 40 0 6 Nov 7 09:53:22 onl50t unix: NOTICE: camac_b: cc->len = 0x3, cc->k->mtc = 0x0 Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 7 09:53:22 onl50t Nov 7 09:53:22 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 7 09:53:22 onl50t (4-5-3). 16 ビットデータを2つ write DMA read で 10ワード読んでから、DMA write を実行した。 つまり、DMA で 使用するシステム・バッファには、先に実行した DMA read 時の読み出した データの痕跡が残っている。 どの様な残りかたをしているかチェック。 onl50t[44]% cam2a Input transfer mode (1:word 2:long word) >1 Input loop >1 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >2 Input n a f >3 0 16 write date is 1, 2, 3, 4,..... *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x1, *(buf+1) = 0x2, *(buf+2) = 0x0, *(buf+3) = 0x0 MODE=1 N= 3 A= 0 F=16 len= 2 lenr= 2 error= 0(Hex) Data( 1)= 1 0x 1(Hex) Data( 2)= 2 0x 2(Hex) Data( 3)= 0 0x 0(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[45]% Nov 7 09:56:47 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e4b78 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov->iov_base = 0x1 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: in: 0x4e4b78 4 1 44 0 0 Nov 7 09:56:47 onl50t unix: NOTICE: camac_b: write: call physio --- uio = 0x335940 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: naf = 0x610 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: wc = 0x2 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address is 4 bytes Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size is 8 bytes Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: dma_addr = 4 bytes Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: dma_addr = 0xb78 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_address = 0xb78 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_laddress = 0xb78 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: cc->dma_cookie.dmac_size = 0x4 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address =0x1, 0x0, 0x5, 0x5, 0x5, 0x5 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->maclo = 0xb78 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->machi = 0x0 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0xa0 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_intr: 0x4e4b78 4 1 44 0 0 Nov 7 09:56:47 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0xb78 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_address =0x1, 0x0, 0x5, 0x5, 0x5, 0x5, 0x5, 0x5, 0x5, 0x5 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0xb7c Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_base =0x1, 0x2, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 7 09:56:47 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 7 09:56:47 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 7 09:56:47 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0xa0 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: camac_b: write: cc->kreg->csr = 0xa0 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: out: 269119772 0 40 0 4 Nov 7 09:56:47 onl50t unix: NOTICE: camac_b: cc->len = 0x2, cc->k->mtc = 0x0 Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 7 09:56:47 onl50t Nov 7 09:56:47 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 7 09:56:47 onl50t (4-6). cam2 による DMA write 動作再確認 1回だけ DMA write を実行すると、フリーズする状況を確認している。 これは DMA シーケンスのどの部分で起っているのか。 それを調べるために、症状が 起った時に、あえてしばらくの間放置しその後で 2917 のリセット・ボタンを 押してシーケンスを中断する。 そうすれば、表示された messages のログの タイムスタンプに時間のズレが記録されているので問題の個所を確認できる。 onl50t[50]% cam2 Input transfer mode (1:word 2:long word) >1 Input loop >1 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >1 Input n a f >3 0 16 Input data >8 *buf = 0x8, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x8, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 MODE=1 N= 3 A= 0 F=16 len= 1 lenr= 1 error= 0(Hex) Data( 1)= 8 0x 8(Hex) Data( 2)= 0 0x 0(Hex) Data( 3)= 0 0x 0(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[51]% Nov 9 09:59:36 onl50t unix: NOTICE: cc_write: cc->kreg-> csr = 0xa0 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e46e8 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov- >iov_base = 0x8 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: in: 0x4e46e8 2 1 42 0 0 Nov 9 09:59:36 onl50t unix: NOTICE: camac_b: write: call physio --- uio = 0x3e d940 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: naf = 0x610 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: wc = 0x1 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: size of cc->dma_cookie.dmac_a ddress is 4 bytes Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: size of cc->dma_cookie.dmac_s ize is 8 bytes Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: size of dma_addr = 4 bytes Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: contents of dma_addr = 0x6e8 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dm ac_address = 0x6e8 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dm ac_laddress = 0x6e8 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dm ac_size = 0x2 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dm ac_address =0x8, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x2a Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x610 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xffff Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xffff Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x80 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xcc8b Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x65bf Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xa44c Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xc5e9 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x5781 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->mtc = 0x1 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cwc = 0x5 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->maclo = 0x6e 8 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->machi = 0x0 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0 x461 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x1 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: cc->kreg->cwc = 0xffff Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: cc->kreg->cser = 0x0 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: 0x4e46e8 2 1 42 0 0 Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0x6 e8 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_a ddress =0x8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0x6e8 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_bas e =0x8, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 9 09:59:36 onl50t Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 9 10:00:58 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x 80 Nov 9 10:00:58 onl50t Nov 9 10:00:58 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x1 Nov 9 10:00:58 onl50t Nov 9 10:00:58 onl50t unix: NOTICE: camac_b: write: cc->kreg->csr = 0x0 Nov 9 10:00:58 onl50t Nov 9 10:00:58 onl50t unix: NOTICE: camac_b: cc->len = 0x1, cc->k->mtc = 0x0 Nov 9 10:00:58 onl50t Nov 9 10:00:58 onl50t unix: NOTICE: out: 269119772 0 40 0 2 Nov 9 10:00:58 onl50t unix: NOTICE: camac_b: cc->len = 0x1, cc->k->mtc = 0x0 Nov 9 10:00:58 onl50t Nov 9 10:00:58 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 9 10:00:58 onl50t Nov 9 10:00:58 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xff00 Nov 9 10:00:58 onl50t Nov 9 10:00:58 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0x0 Nov 9 10:00:58 onl50t 出力された messages ログを見ると、1分程度の時間的なズレが生じている 個所がある。 それは以下に再掲したように、インタラプト・サービス・ ルーチンの中である。 Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 9 09:59:36 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 9 10:00:58 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x 80 Nov 9 10:00:58 onl50t Nov 9 10:00:58 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x1 この部分に問題がありそうなので、もっと細かくトレースしてみる。 onl50t[45]% vi cc64.c : static u_int /* cc_intr(int unit) */ cc_intr(caddr_t unit) { : cc->interrupt |= CC_INT_ABORT; cmn_err(CE_NOTE," cc_intr: CC_INT_ABORT: step02."); } /* end */ /* free DMA resources */ if (cc->executing_dma_flag != 0) { /* E.Inoue */ chk_done = 0x7ffffff; /* about 10 sec */ while (chk_done-- > 0){ if ((ddi_get16(cc->kreg_handle, &cc->kreg->csr) & CC_DONE) != 0){ cc->interrupt |= CC_INT_DONE; break; } } /* end */ cmn_err(CE_NOTE," cc_intr: freeze check: step01."); : onl50t[48]% Nov 9 10:34:32 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 9 10:34:32 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 9 10:35:47 onl50t unix: NOTICE: cc_intr: freeze check: step01. Nov 9 10:35:47 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x 80 トレース結果から言えることは、2917 の csrレジスタの DONEフラグをチェック している部分に問題がありそうだということである。 (5). VMEバスアナライザによるチェック (5-1). 2ワードの DMA write を実行した時の VMEバスの状態をトレース onl50t[43]% cam2 Input transfer mode (1:word 2:long word) >1 Input loop >1 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >2 Input n a f >3 0 16 Input data >5 *buf = 0x5, *(buf+1) = 0x5, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x5, *(buf+1) = 0x5, *(buf+2) = 0x0, *(buf+3) = 0x0 MODE=1 N= 3 A= 0 F=16 len= 2 lenr= 2 error= 0(Hex) Data( 1)= 5 0x 5(Hex) Data( 2)= 5 0x 5(Hex) Data( 3)= 0 0x 0(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[44]% Nov 13 14:43:15 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e46e8 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov->iov_base = 0x5 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: in: 0x4e46e8 4 1 44 0 0 Nov 13 14:43:15 onl50t unix: NOTICE: camac_b: write: call physio --- uio = 0x383940 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: naf = 0x610 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: wc = 0x2 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: size of cc->dma_cookie.dmac_address is 4 bytes Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: size of cc->dma_cookie.dmac_size is 8 bytes Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: size of dma_addr = 4 bytes Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: contents of dma_addr = 0x6e8 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address = 0x6e8 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_laddress = 0x6e8 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_size = 0x4 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address =0x5, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x2a Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x610 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xfffe Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xffff Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x80 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xcc0f Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x65af Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xe44c Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xcdcd Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x5781 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->mtc = 0x2 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cwc = 0x6 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->maclo = 0x6e8 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_strategy: write: cc->kreg->machi = 0x0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0xa0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: cc->kreg->cwc = 0x0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: cc->kreg->cser = 0x8000 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: 0x4e46e8 4 1 44 0 0 Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0x6e8 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_address =0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0x6ec Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_base =0x5, 0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: size of ddi_get16(cc->kreg_handle, &cc->kreg->csr) is 4 bytes Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: size of CC_DONE is 4 bytes Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: freeze check: step01. Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0xa0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: camac_b: write: cc->kreg->csr = 0xa0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: camac_b: cc->len = 0x2, cc->k->mtc = 0x0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: out: 269119772 0 40 0 4 Nov 13 14:43:15 onl50t unix: NOTICE: camac_b: cc->len = 0x2, cc->k->mtc = 0x0 Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 13 14:43:15 onl50t Nov 13 14:43:15 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 13 14:43:15 onl50t 実行結果を、 http://online.kek.jp/~inoue/CAMAC/onl50t-sol7/Desktop/c2d5t1.jpg http://online.kek.jp/~inoue/CAMAC/onl50t-sol7/Desktop/c2d5t1a.jpg に示す。 1回目の DMA write では、データ 0x5 がシステム・バッファの 0x6e8 から 読み出され、2917 に転送された。 これに対して 2917 は DTACK を返して 1回目の転送は正常に終了している。 2回目の DMA write では、データ 0x5 がシステム・バッファの 0x6ea から読み出され、2917 に転送された。 2917 は DTACK を返してデータ転送は 2つとも正しく実行されているのが確認できた。 (5-2). 1ワードの DMA read を実行した時の VMEバスの状態をトレース onl50t[44]% cam2 Input transfer mode (1:word 2:long word) >1 Input loop >1 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >1 Input n a f >3 1 0 *buf = 0x0, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x5, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 MODE=1 N= 3 A= 1 F= 0 len= 1 lenr= 1 error= 0(Hex) Data( 1)= 5 0x 5(Hex) Data( 2)= 0 0x 0(Hex) Data( 3)= 0 0x 0(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[45]% Nov 13 14:47:54 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0xa0 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: iov->iov_base = 0x4e46e8 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_write: CC_CMD_DOBLOCK: contents of iov->iov_base = 0x0 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: in: 0x4e46e8 2 1 42 0 0 Nov 13 14:47:54 onl50t unix: NOTICE: camac_b: read: call physio --- uio = 0x383940 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: mode = 0x2a Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: naf = 0x620 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: wc = 0x1 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: cc->ccount = 0x1 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: size of cc->dma_cookie.dmac_address is 4 bytes Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: size of cc->dma_cookie.dmac_size is 8 bytes Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: size of dma_addr = 4 bytes Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: contents of dma_addr = 0x6e8 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address = 0x6e8 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_laddress = 0x6e8 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_size = 0x2 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: contents of cc->dma_cookie.dmac_address =0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x2a Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x620 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xffff Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xffff Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x80 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xcc0f Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x65af Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xe44c Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0xcdcd Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cmr = 0x5781 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->mtc = 0x1 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->cwc = 0x6 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->maclo = 0x6e8 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_strategy: read: cc->kreg->machi = 0x0 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: enter intrrupt: cc->kreg->csr = 0x80 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: cc->kreg->cwc = 0x0 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: cc->kreg->cser = 0x8000 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: 0x4e46e8 2 1 42 0 0 Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: cc->dma_cookie.dmac_address = 0x6e8 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: contents of cc->dma_cookie.dmac_address =0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: cc->kreg->maclo = 0x6ea Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: cc->kreg->machi = 0x0 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: contents of uio->uio_iov->iov_base =0x5, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: CC_INT_DONE: step02. Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: CC_INT_EMPTY: step02. Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: CC_INT_ABORT: step02. Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: size of ddi_get16(cc->kreg_handle, &cc->kreg->csr) is 4 bytes Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: size of CC_DONE is 4 bytes Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: freeze check: step01. Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: exit intrrupt: cc->kreg->csr = 0x80 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_intr: cc->kreg->mtc(wc) = 0x0 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: camac_b: read: cc->kreg->csr = 0x80 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: camac_b: cc->len = 0x1, cc->k->mtc = 0x0 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: out: 269119772 0 40 0 2 Nov 13 14:47:54 onl50t unix: NOTICE: camac_b: cc->len = 0x1, cc->k->mtc = 0x0 Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_write: cc->interrupt = 0xe Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_write: cc->kreg->donv = 0xffff Nov 13 14:47:54 onl50t Nov 13 14:47:54 onl50t unix: NOTICE: cc_write: cc->kreg->csr = 0x80 Nov 13 14:47:54 onl50t 実行結果を、 http://online.kek.jp/~inoue/CAMAC/onl50t-sol7/Desktop/c1drt1.jpg http://online.kek.jp/~inoue/CAMAC/onl50t-sol7/Desktop/c1drt1a.jpg に示す。 1回目の DMA read で、データ 0x5 が camac から読み出され 2917 のデータ バッファからシステム・バッファの 0x6e8 へ転送されている。 これに対して CPUボードの VMEインターフェースは DTACK を返してデータ転送は正常に終了 している。 (5-3). 1ワードの DMA write を実行した時の VMEバスの状態をトレース cam2プログラムを実行して、naf= 3,0,16 で 1回だけ write date= 0x7 を 書いた。 VMEバスアナライザでは アドレス 0x6e8 をトリガ条件にして待って いたが、DMA がフリーズした時点ではVMEバスアナライザのトリガはかからな かった。 2917をリセットして DMA を強制終了させた時点でもトリガはかからな かった。 従って、この場合にはトレース・データを得ることができなかった。 ここでのテスト結果から言えることは、DMAコントローラに DMA "GO" の信号を 送った時点で、DMAコントローラが DMA システム・バッファの 0x6e8 アドレス を読みに行っていないということである。 その原因は現在つかめていない。 (5-4). 1ワードの DMA write を実行した時の VMEバスの状態をトレース VMEバスアナライザのトリガ条件を変更してみる。 上記のテストでは全て アドレスパターンでトリガをかけているが、ここではデータ・パターンでトリガ をかけてみる。 onl50t[60]% cam2 Input transfer mode (1:word 2:long word) >1 Input loop >1 Input mode (0:QSTOP 1:QIGNORE 2:QREPEAT 3:QSCAN) >1 Input data counts >1 Input n a f >3 0 16 Input data >777 <---- ここでフリーズ、2917をリセット。 *buf = 0x309, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 *buf = 0x309, *(buf+1) = 0x0, *(buf+2) = 0x0, *(buf+3) = 0x0 MODE=1 N= 3 A= 0 F=16 len= 1 lenr= 1 error= 0(Hex) Data( 1)= 777 0x 309(Hex) Data( 2)= 0 0x 0(Hex) Data( 3)= 0 0x 0(Hex) Data( 4)= 0 0x 0(Hex) Data( 5)= 0 0x 0(Hex) Data( 6)= 0 0x 0(Hex) Data( 7)= 0 0x 0(Hex) Data( 8)= 0 0x 0(Hex) Data( 9)= 0 0x 0(Hex) Data(10)= 0 0x 0(Hex) Note: Nonstandard floating-point mode enabled See the Numerical Computation Guide, ieee_sun(3M) onl50t[61]% cam2プログラムを実行して、naf= 3,0,16 で 1回だけ write date= 777(0x309) を書いた。 VMEバスアナライザでは データ0x309 をトリガ条件にして待って いたが、DMA がフリーズした時点ではVMEバスアナライザのトリガはかからな かった。 2917をリセットして DMA を強制終了させた時点でもトリガはかからな かった。 この場合もトレース・データを得ることができなかった。 上記の アドレス 0x6e8 をトリガ条件にした時の結果およびここでやった データ0x309 をトリガ条件にした時の結果を合わせて考えると、DMAコント ローラが DMA システム・バッファの 0x6e8 アドレスを読みに行っていないと いう疑いは一層濃くなった。 (5-5). トリガ条件設定の再検証 トリガ条件設定に問題は無いか再確認する。 ここではトリガするアドレスを 少し緩めにしてみた。 cam2プログラムを実行して、naf= 3,0,16 で 1回だけ write date= 0x6 を 書いた。 VMEバスアナライザでは アドレス 0x(xxxxx6xx) をトリガ条件に して待っていたが、DMA がフリーズした時点ではVMEバスアナライザのトリガは かからなかった。 2917をリセットして DMA を強制終了させた時点でもトリガは かからなかった。 この場合にはトレース・データを得ることができなかった。 これと全く同じトリガ条件で、cam2プログラムを実行して、naf= 3,0,16 で write date= 6 を2回書いた時には正常にトレースできている。 この時の実行 結果を、 http://online.kek.jp/~inoue/CAMAC/onl50t-sol7/Desktop/c2d6t2.jpg http://online.kek.jp/~inoue/CAMAC/onl50t-sol7/Desktop/c2d6t2a.jpg に示す。 ここまでの実行結果からみて、DMA write を 1回だけ実行した時にVMEバス アナライザでトレースできないのは、トリガ条件設定の問題ではなくて DMA の 開始された時点で、DMAコントローラが DMAシステム・バッファを読みに行って いないとみてよいだろう。 (6). 64ビット camacドライバの開発について 現在の状況を整理してみる。 camacドライバの利用可能な機能は次の通り。 (1). シングルアクション read/write は正常に動作している。 (2). LAM割り込み処理は正常に動作している。 (3). ブロック転送 read は正常に動作している。 (4). ブロック転送 write は、 2 camacワード以上の転送は、正常に動作している。 1 camacワードのみの転送は、フリーズする。 問題になっている点は、"1 camacワードのブロック転送 write" のみである。 この未稼動の機能は実際に使われる可能性はとても低い部分である。 つまり、 現在、動作している機能で実用上は支障は起らないと思われる。 そこで、 オンライングループ内の了解をとってベータ版の 64ビット camacドライバを 公開することにした。 公開するキットには、"1 camacワードのブロック転送 write は未稼動" の一文を付けることにする。 ---xxxx(ここまでやった。 継続中) --- (6). セクション (6-1). サブセクション (6-1-1). サブサブセクション